Senior Design Verification Engineer

Scaledge Technology is Hiring: Design Verification Engineer with 5Years of experience in IP or Subsystem verification. Location: Bangalore Share updated resume on sneha.khandelwal@scaledge.io Requirements: 4–6 years of experience in ASIC/SoC Design Verification. Experience verifying any of the protocols such as SPI, SMBus/I2C, NAND Flash, JTAG, and AXI. Strong knowledge of System Verilog and UVM methodology. Hands-on experience with VIP integration and testbench development. Strong debugging a…