Senior Physical Design Engineer

Senior PD Engineer Experience : 5-6 years Location : Bangalore own critical CPU blocks from RTL-to-GDSII , driving convergence across synthesis, P&R, timing closure, and signoff. Work closely with micro-architecture teams to optimize PPA tradeoffs and deliver high-performance designs. Hands-on expertise with industry tools like Synopsys Fusion Compiler , Cadence , PrimeTime, StarRC, Calibre, and Apache RedHawk is key. Interested,please share your updated resume to janagaradha.n@acldigital.com