RTL Design Engineer

Job description: Position: RTL Design Engineer Location: Bangalore Experience Level: 4 years Notice Period - 0 to 90 days Roles& Responsibilities: Should have experience with ASIC micro-architecture development Expertise and hands on experience in Verilog/RTL design for IP/Sub-System or SoC. Command and thorough knowledge on digital logic design concepts. Should be good knowledge on Lint, CDC, RDC, constraint development, synthesis. Must have worked on at least one large IP/Sub-System block and…