Design Verification Engineer

Job Description: ASIC Design Verification Engineer Location: - Bangalore, Chennai, Hyderabad, Noida, Pune, Coimbatore Experience Range: 5 to 15years Key Responsibilities: IP verification Using SV/UVM or SOC Verification using C/SV VIP Integration Interconnect Protocols: .DDR/PCIe/Mipi/USB/Image Sensing/Ethernet/CXL/Dispalyport/UCI/ Power mgmt. SOC Interfaces: GPIO, SPI, I2C, UART (3) High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI or UPF or DDR Coverage Closure: Code, Functional and …