Opening for FPGA Design role - Bangalore

UST India
Posted 1 month, 2 weeks ago

Job Description

Hi, We have an opening for FPGA Design engineer role - Bangalore REQUIRED: EXP: 5 to 12 years Experience with FPGA system design from IP Integration to implementation, Verilog RTL based IP design, Verilog/System Verilog based testbench development Experience with AMD Vivado & Vitis SDK & VItis AI tools. Experience with C/C++ in developing Embedded FW & scripting automation using Python Experience with Petalinux build flow , familiarity with Uboot, linux driver changes and FPGA SoC debugging. Pl…

Required Skills

Python Linux AI

Requirements

Employment Type

Permanent

Category

IT Jobs

About UST

Location: India

Industry: IT Jobs

Sign in to apply or see your match score

Sign In to Apply Create Account
Quick Actions
Back to Job Search