DFT Engineer

DFT Engineer Experience - 5years Location- Bangalore/Hyderabad Experience with Chip level DFT and Post Silicon debug / analysis Understanding of DFT architectures like : scan chain insertion and verification Scan Compression Techniques JTAG a. ATPG Pattern generation b. ATPG coverage analysis c. Pattern simulation ( both timing/no timing) d. Pattern Retargeting e. Understanding JTAG/IJTAG f. MBIST and Logic BIST Proficient in writing SDC constructs for DFT modes Proficient in Python, PERL/Shell…